Robust Optimization and Reflection Gain Enhancement of Serial Link System for Signal Integrity and Power Integrity

System level signal integrity and power integrity problems for high speed serial links have been explored in this paper. An example of the USB 2.0 IP has been used in this paper, but the analysis is generic for all serial links. This paper considers signal and power integrity as effects simultaneoulsy. A model is developed to optimize the performance of high speed serial link in terms of jitter and amplitude performance. Sensitivity analysis is carried out with a set of dependent parameters affecting the performance. Taguchi array optimization has been applied during the optimization process. Finally, reflection gain concept is also applied to further improve the performance for the eye diagram. A strong correlation between measured and simulated results is shown. A generic methodology for SI and PI for high speed serial links is presented with complete analysis of package, board, termination, squidd card, decoupling network etc.